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Description
CYStech Electronics Corp.
Spec. No. : C504A3 Issued Date : 2003.03.21 Revised Date : Page No. : 1/9
Adjustable shunt regulator
PL432XA3/N3
Features
Low voltage operation(down to 1.24V) Wide operating current range 80A to 100mA Low dynamic output impedance 0.05 typ. Trimmed bandgap design 0.25% Upgrade for PL431 Available in TO-92 and SOT-23 packages The PL432 is a three terminal adjustable shunt regulator with thermal stability guaranteed over temperature. The output voltage can be adjusted to any value from 1.24V(VREF) to 20V with two external resistors. The PL432 has a typical dynamic output impedance of 0.05. Active output circuitry provides a very sharp turn on characteristic, making the PL432 an excellent replacement for zener diodes. The PL432 shunt regulator is available with four Voltage tolerances(0.25%,0.5%,1% and 2%), and two package options(TO-92 and SOT-23). This allows the designer the opportunity to select the optimum combination of cost and performance for their application.
Applications
Linear Regulators Adjustable Supplies Switching Power Supplies Battery Operated Computers Instrumentation Computer Disk Drives
Typical Application Circuit(Note 1,2)
Notes:
VIN R VOUT
R1
VREF
PL432
R2
GND
1) Set VOUT according to the following equation: VOUT=VREF(1+R1/R2)+IREFR1 2) Choose the value for R as follows: The maximum limit for R should be such that the cathode current, Iz, is greater than the minimum operating current(80A) at VIN(MIN). The minimum limit for R should be as such that Iz does not exceed 100mA under all load conditions, and the instantaneous turn-on value for Iz does not exceed 150mA. Both of the following conditions must be met: RminVIN(max)/150mA(to limit instantaneous turn-on Iz) Rmin VIN(max)-VOUT (to limit Iz under IOUT(min)+100mA normal operating conditions)
PL432XA3/N3
CYStek Product Specification
cystek
CYStech Electronics Corp.
Spec. No. : C504A3 Issued Date : 2003.03.21 Revised Date : Page No. : 2/9
Absolute Maximum Ratings
Parameter Cathode Voltage Continuous Cathode Current Reference Input Current Power Dissipation at TA=25 SOT-23 TO-92 Thermal Resistance SOT-23 TO-92 Operating Ambient Temperature Range Operating Junction Temperature Range Storage Temperature Range Lead Temperature(Soldering) 10 seconds ESD Rating(Human Body Model) Symbol Vz IZ IREF PD Maximum 20 100 3 0. 37 0.95 336 132 0 to +70 0 to +150 -65 to +150 300 2 Units V mA mA W
JA TA TJ Tstg TLEAD VESD
/W kV
Electrical Characteristics
Unless otherwise specified, TA=25. Values in bold apply over full operating ambient temperature range. PL432D Parameter Reference Voltage VREF Temperature Deviation Ratio of Change in VREF to change in VZ Reference Input Current IREF Temperature Deviation Off-state Cathode Current Dynamic Output Impedance Minimum Operating Current Symbol Condition VREF VZ=VREF,IZ=10mA(Note 1) VDEV VZ=VREF,IZ=10mA(Note 1) VREF IZ=10mA, VZ=16V to VREF VZ IREF R1=10k,R2=, IZ=10mA(Note2) IREF(DEV) R1=10k,R2=, IZ=10mA(Note 2) IZ(OFF) VREF=0V,VZ=6V(Note 3) VREF=0V,VZ=16V(Note 3) f <1kHz,VZ=VREF rz IZ=100A to 100mA(Note 1) IZ(MIN) VZ=VREF(Note 1) Min 1.237 1.224 Typ 1.240 10 -1.0 0.15 0.1 0.125 0.135 0.05 20 Max 1.243 1.256 25 -2.7 0.5 0.4 0.150 0.150 0.15 80 Min 1.234 1.222 PL432C Typ Max 1.240 1.246 1.258 10 25 -1.0 0.15 0.1 0.125 0.135 0.05 20 -2.7 0.5 0.4 0.150 0.150 0.15 80 Unit V mV mV/V A A A A
PL432XA3/N3
CYStek Product Specification
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Parameter Reference Voltage VREF Temperature VDEV Deviation Ratio of Change in VREF VREF to change in VZ VZ Reference Input IREF Current IREF Temperature IREF(DEV) Deviation Off-state Cathode IZ(OFF) Current Dynamic Output rz Impedance Minimum Operating IZ(MIN) Current Notes: (1) See Test Circuit 1. (2) See Test Circuit 2. (3) See Test Circuit 3.
CYStech Electronics Corp.
Spec. No. : C504A3 Issued Date : 2003.03.21 Revised Date : Page No. : 3/9
Electrical Characteristics(Cont.)
Unless otherwise specified, TA=25. Values in bold apply over full operating ambient temperature range. PL432B Symbol Condition VREF VZ=VREF,IZ=10mA(Note 1) VZ=VREF,IZ=10mA(Note 1) IZ=10mA, VZ=16V to VREF R1=10k,R2=, IZ=10mA(Note2) R1=10k,R2=, IZ=10mA(Note 2) VREF=0V,VZ=6V(Note 3) VREF=0V,VZ=16V(Note 3) f<1kHz,VZ=VREF IZ=100A to 100mA(Note 1) VZ=VREF(Note 1) Min 1.228 1.215 Typ 1.240 10 -1.0 0.15 0.1 0.125 0.135 0.05 20 Max 1.252 1.265 25 -2.7 0.5 0.4 0.150 0.150 0.15 80 Min 1.215 1.200 PL432A Typ Max 1.240 1.265 1.280 10 35 -1.0 0.15 0.1 0.125 0.135 0.05 20 -2.7 0.5 0.4 0.150 0.150 0.15 80 Unit V mV mV/V A A A A
Recommended Operating Conditions
Symbol Cathode Voltage Cathode Current VZ IZ Min VREF 0.08 Max 16 100 Unit V mA
Test Circuits
VIN VZ VIN VZ VIN VZ
IREF
IZ
R1 IREF VREF
IZ
IZ(off)
R2 Test Circuit 1 VZ=VREF Test Circuit 2 VZ>VREF Test Circuit 3 Off-State
PL432XA3/N3
CYStek Product Specification
cystek
2
CYStech Electronics Corp.
Spec. No. : C504A3 Issued Date : 2003.03.21 Revised Date : Page No. : 4/9
SOT-23(Top View)
TO-92(Top View)
Cathode
3
Cathode Anode Reference
Anode
3 1
2
Reference
1
Block Diagram
Cathode
Symbol
Cathode
REF
REF
VREF
Anode
Anode
Ordering Information
Package TO-92 SOT-23 0.25% PL432DA3 PL432DN3 Tolerance 0.5% PL432CA3 PL432CN3 1% PL432BA3 PL432BN3 2% PL432AA3 PL432AN3
PL432XA3/N3
CYStek Product Specification
cystek
300
CYStech Electronics Corp.
Spec. No. : C504A3 Issued Date : 2003.03.21 Revised Date : Page No. : 5/9
Characteristic Curves
Cathode Current vs Cathode Voltage
150 Vz=VREF TA=25 100 50 0 -50 -100 -150 -1.5 -1 -0.5 0 0.5 1 1.5 Vz=VREF TA=25
Cathode Current vs Cathode Voltage
Cathode Current---IZ(A)
100 0 -100 -200 -300
Cathode Current---Iz(mA)
200
-1
-0.5
0
0.5
1
1.5
Cathode Voltage---Vz(V)
Cathode Voltage---Vz(V)
Reference Voltage vs Junction Temperature
1.248 Reference Voltage---VREF(V) 1.246 1.244 1.242 1.24 1.238 1.236 1.234 -50 0 50 100 150 Junction Temperature---TJ() IZ=60A Iz=10mA Reference Input Current---IREF(nA) 150
Reference Input Current vs Junction Temperature
125
Iz=10mA R1=10k R2=
100
75
50 -50 -25 0 25 50 75 100 125 150 Junction Temperature---TJ()
Ratio of Delta Reference Voltage to Delta Cathode Voltage vs Junction Temperature
1.2 1.1 1 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 -50 Iz=10mA Vz=16V to VREF Off-State Cathode Current---Iz (off)(nA)
Off-State Cathode Current vs Junction Temperature
250 VREF=0V 200 150 100 Vz=6V 50 0 Vz=16V
VREF/Vz---(-mV/V)
-25
0
25
50
75
100
125
150
-50
-25
0
25
50
75
100
125
150
Junction Temperature---TJ()
PL432XA3/N3
Junction Temperature---TJ()
CYStek Product Specification
cystek
0.5
CYStech Electronics Corp.
Spec. No. : C504A3 Issued Date : 2003.03.21 Revised Date : Page No. : 6/9
Reference Impedance vs Junction Temperature
100 Reference Impedance---rz() Iz=0.1 to 100mA Vz=VREF f<1kHz 0.45 0.4 0.35 0.3 0.25 0.2 0.15 0.1 0.05 0 -50 -25 0 25 50 75 100 125 150
Reference Impedance vs Frequency
TA=25
Reference Impedance---rz()
10
1
0.1 1000
10000
100000
1000000
Junction Temperature---TJ()
Frequency---f(Hz)
Small-Signal Gain vs Frequency
70 60 Small-Signal Gain---AV(dB) 50 40 30 20 10 0 -10 -20 100 1000 10000 100000 1000000 Small-Signal Phase Shift---(Deg)
Small-Signal Phase Shift vs Frequency
-180
-225
-270
-315
-360 100 1000 10000 Frequency---f(Hz) 100000 1000000
Frequency---f(Hz)
Stability Boundary Condition For Shunt Regulation vs Cathode Current and Load Capacitance
3.5
TA=25
3
Cathode Current---Iz(mA)
2.5 2 1.5 1 0.5 0
Stable
Stable
Vz=VREF
Vz=2V
0.001
0.01 0.1 1 Load Capacitance---CL(F)
10
PL432XA3/N3
CYStek Product Specification
cystek
Iz 10F
+
CYStech Electronics Corp.
Test Circuit-Stability
R
Spec. No. : C504A3 Issued Date : 2003.03.21 Revised Date : Page No. : 7/9
Test Circuit-Small-Signal Gain and Phase
OUT
Iz
15k PL432
232
PL432
R1
CL R2
8.25k
GND
Applications Information - Stability
Selection of load capacitance when using PL432 as a shunt regulator When the PL432 is used as a shunt regulator, two options for selection of CL(see diagram on page 6) are recommended for optimal stability: 1) No load capacitance across the device, decouple at the load. 2) Large capacitance across the device, optimal decoupling at the load. The reason for this is that PL432 exhibits instability with capacitances in the range of 10nF to 1F (approx.) at light cathode currents(up to 3mA typical). The device is less stable the lower the cathode voltage has been set for. Therefore while the device will be perfectly stable operating at a cathode current of (say) 10mA with a 0.1F capacitor across it, it will oscillate transiently during start-up as the cathode current passes through the instability region. Selecting a very low (or preferably, no) capacitance, or alternatively a high capacitance(such as 10F) will avoid this issue altogether. Since the user will probably wish to have local decoupling at the load anyway, the most cost effective method is to use no capacitance at all directly across the device. PCB trace/via resistance and inductance prevent the local load decoupling from causing the oscillation during the transient start-up phase. Note : if the PL432 is located right at the load, so the load decoupling capacitor is directly across it, then this capacitor will have to be 1nF or 10F.
PL432XA3/N3
CYStek Product Specification
cystek
TO-92 Dimension
A B
1 2 3
CYStech Electronics Corp.
Spec. No. : C504A3 Issued Date : 2003.03.21 Revised Date : Page No. : 8/9
2
Marking:
3
C 432 PL431
C
D
H I E F
G
1
Style: Pin 1.Reference 2.Anode 3.Cathode 3-Lead TO-92 Plastic Package CYStek Package Code: A3
*: Typical
DIM A B C D E F
Inches Min. Max. 0.1704 0.1902 0.1704 0.1902 0.5000 0.0142 0.0220 *0.0500 0.1323 0.1480
Millimeters Min. Max. 4.33 4.83 4.33 4.83 12.70 0.36 0.56 *1.27 3.36 3.76
DIM G H I 1 2 3
Inches Min. Max. 0.0142 0.0220 *0.1000 *0.0500 *5 *2 *2
Millimeters Min. Max. 0.36 0.56 *2.54 *1.27 *5 *2 *2
Notes: 1.Controlling dimension: millimeters.
2.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.If there is any question with packing specification or packing method, please contact your local CYStek sales office.
Material:
* Lead: 42 Alloy ; solder plating * Mold Compound: Epoxy resin family, flammability solid burning class: UL94V-0
PL432XA3/N3
CYStek Product Specification
cystek
SOT-23 Dimension
A L 3
CYStech Electronics Corp.
Spec. No. : C504A3 Issued Date : 2003.03.21 Revised Date : Page No. : 9/9
Marking:
B 1 2
S
432
V
G
3-Lead SOT-23 Plastic Surface Mounted Package CYStek Package Code: N3 Style: Pin 1.Reference 3.Anode 2.Cathode
C D K
H
J
*: Typical
DIM A B C D G H
Inches Min. Max. 0.1102 0.1204 0.0472 0.0630 0.0335 0.0512 0.0118 0.0197 0.0669 0.0910 0.0005 0.0040
Millimeters Min. Max. 2.80 3.04 1.20 1.60 0.89 1.30 0.30 0.50 1.70 2.30 0.013 0.10
DIM J K L S V
Inches Min. Max. 0.0034 0.0070 0.0128 0.0266 0.0335 0.0453 0.0830 0.1083 0.0098 0.0256
Millimeters Min. Max. 0.085 0.177 0.32 0.67 0.85 1.15 2.10 2.75 0.25 0.65
Notes: 1.Controlling dimension: millimeters.
2.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.If there is any question with packing specification or packing method, please contact your local CYCtek sales office.
Material:
* Lead: 42 Alloy; solder plating * Mold Compound: Epoxy resin family, flammability solid burning class: UL94V-0
Important Notice:
* All rights are reserved. Reproduction in whole or in part is prohibited without the prior written approval of CYStek. * CYStek reserves the right to make changes to its products without notice. * CYStek semiconductor products are not warranted to be suitable for use in Life-Support Applications, or systems. * CYStek assumes no liability for any consequence of customer product design, infringement of patents, or application assistance.
PL432XA3/N3
CYStek Product Specification

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